Products-UFS-Silicon Motion
USB 2.0 PHY IP Core
Webcam - Encore Electronics Inc.
USB 2.0 PHY Verification
Mixed-Signal Verification for USB 2.0 Physical Layer IP
USB 2.0 PHY IP core | Arasan Chip Systems
PHY IP for USB 2.0 for TSMC | Cadence
USB 2.0 PHY IP in 14SFP
Canovatech - CT25201
XPS USB 2.0 Host Controller IP - Missing Link Electronics
The Next-Generation Interconnect | Mouser
Block diagram of UFP type-C USB 2.0 without PD The USB 2.0 physical... | Download Scientific Diagram
USB v2.0 Soft PHY and Device Controller
Figure 2 from Verilog synthesis of USB 2.0 full-speed device PHY IP | Semantic Scholar
High Speed Inter-CHIP USB 2.0 PHY | Arasan Chip Systems
Soft Mixed Signal Corporation USB 2.0 PHY IP Cores
Archimago's Musings: MEASUREMENTS: Computer USB port noise, USB hubs and the 8kHz PHY Microframe Packet Noise
Full Speed USB 2.0 Hub Controller - EEWeb
Synopsys IP Technical Bulletin: USB High Speed Inter-Chip (HSIC) IP: What is it? And why should I use it?
Low Power USB 2.0 PHY IP for High-Volume Consumer Applications
Figure 1 from Verilog synthesis of USB 2.0 full-speed device PHY IP | Semantic Scholar
